In a recent keynote speech at the International Memory Workshop in Seoul, South Korea, Kioxia shared its insights on the technology and challenges of increasing the storage density of 3D NAND flash memory. According to Kioxia’s predictions, by 2027, the storage density could reach an impressive 100Gbit/mm2 with 1,000 word line stacks.
To put this in perspective, a storage density of 100Gbit/mm2 would mean that a silicon die of just 64 square millimeters could hold a remarkable 6.4 Tbit, which is equivalent to approximately 800 GB. If a package consists of eight such dies, it could offer a whopping 6,400 GB, and with four packages of flash storage, a staggering 25.6 TB could be achieved. This means that by 2028, it could be possible to have a 20TB SSD that is competitively priced with 20TB HDDs, ranging between $250 and $350.
However, reaching the projected 1,000 layers by 2027 is no easy task. As the number of layers increases, it becomes increasingly challenging to form channel holes that penetrate the stacked word lines. Advanced etching techniques, such as low-temperature Reactive Ion Etching (RIE), are necessary to manage the high aspect ratio of these deep holes. Additionally, with the increase in depth, channel resistance and signal noise become problematic, which could necessitate a shift from polycrystalline to single-crystal silicon using Metal Induced Lateral Crystallization (MILC) technology. This switch could double the cell current, ultimately improving performance.
It is worth noting that merely increasing the number of word line stacks does not necessarily result in improved storage density because of the “staircase” area used for vertical electrodes. However, there are innovations that can enhance storage density, such as combining vertical electrodes and switching from Triple-Level Cell (TLC) to Quadruple-Level Cell (QLC), which allows for four bits per cell. Additionally, pushing for multilevel processing, including Penta-Level Cell (PLC) with five bits per cell, Hexa-Level Cell (HLC) with six bits per cell, and Octal-Level Cell (HeLC) with eight bits per cell, can greatly increase storage density.
As the number of word line stacks increases, there is a concern about delay times due to resistance and capacitance. However, this issue can potentially be mitigated by reducing the stacking pitch and changing the word line metal material from tungsten to molybdenum. These adjustments may help maintain the pace of advancements in storage density.
While the storage density of 3D NAND flash memory has shown steady improvement over the years, companies like Kioxia and Samsung are aware that future advancements will require new technologies and innovations to continue at this pace and potentially achieve the dream goal of petabyte SSDs.
Overall, Kioxia’s predictions for reaching a storage density of 100Gbit/mm2 with 1,000 word line stacks by 2027 are ambitious but feasible, considering historical trends. By addressing the challenges associated with increasing layers, optimizing electrode configurations, and exploring new materials, the industry may indeed witness significant advancements in 3D NAND flash memory technology, ushering in a new era of high-capacity SSDs.
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